ãMaking Tetris for FPGAããšããèšäºãèªãã åŸãç§ã¯ãã€ãŠåœŒå¥³ã«ãæãšå¿ããæäŸããããã«äœ¿çšããŠããé¡äŒŒã®ãããžã§ã¯ãããã£ãããšãæãåºããŸããã
ãããŠãããªãã«äŒŒããããªããšãããŠã¿ãŸãããïŒ
ãœãŒã¹ãæãäžããŠã圌ã¯å€±ãããç¥èãæŽæ°ããå€ããããžã§ã¯ãã«åºã¥ããŠãå€ãããŒãžã§ã³ã®Spartan3Eã§ã²ãŒã ãMinesweeperãã®ç°¡åãªããŒãžã§ã³ãäœæããããšã決ããŸããã å®éãè«çã²ãŒãã®ã¬ãã«ã§ã®ãã€ã³ã¹ã€ãŒãã²ãŒã ã®å®è£ ãšã¶ã€ãªã³ã¯ã¹FPGAã®éçºã®äž»ãªæ©èœã«ã€ããŠã¯ããã®èšäºã§èª¬æããŸãã
ãããã°ããŒã
æ°å¹ŽåãFPGAãšVGAãPS / 2ãLEDãšLEDãã£ã¹ãã¬ã€ã®ååšãããªã¬ãŒã¹ã€ãããªã©ã®ç°ãªãã€ã³ã¿ãŒãã§ãŒã¹ãžã®æãã·ã³ãã«ãªãã€ã³ãã£ã³ã°ãåãããããã°ããŒãã®äºç®ãªãã·ã§ã³ãæ¢ããŠããŸããã ããããç§ã¯æãç°¡åãªäžåœã®ã¯ãžã©ã«èœã¡çããŸãããããã¯é éãèæ ®ã«å ¥ããŠ135.00ãã«ã§ebayã§æ³šæããã®ãæãç°¡åã§ããã ã¡ãªã¿ã«ããããã¯äžå®å šã§ããã®ã§ãç§ã¯æã£ãã¬ãã¥ãŒãæ®ããŸãããããã«å¯ŸããŠå£²ãæã¯20ãã«ãè¿ããŸããã ãã®ãããããŒãã®äŸ¡æ Œã¯æ§äŸ¡æ Œã§çŽ4000rã§ããã

ã¯ãžã©ã®è£œé æ¥è ã®å ¬åŒãŠã§ããµã€ã ã
devkitaã®äž»ãªæ©èœïŒ
- FPGA Spartan3EïŒ XC3S500E-4PQ208C ïŒ -50äžè«çã²ãŒãã
- ã¯ããã¯ãœãŒã¹CLK = 50 MHzã
- å€éšã¡ã¢ãª64M SDRAMã
- FPGAãã¡ãŒã ãŠã§ã¢ãä¿åããããã®SPIãã©ãã·ã¥ïŒM25P80ïŒã
- LEDãããªãã¯ã¹8x8ãLEDã©ã€ã³8åã
- 8ã€ã®ã¹ã€ãããš5ã€ã®ãã¿ã³ã
- LEDãã£ã¹ãã¬ã€çšã³ãã¯ã¿ã
- ãã£ã¹ãã¬ã€çšVGAã³ãã¯ã¿
- PS / 2ã³ãã¯ã¿ãªã©
Spartan3E XC3S500Eã¯ãªã¹ã¿ã«ã®ãªãœãŒã¹ãè¡šã«ç€ºããŸãã

ãã€ã³ã¹ã€ãŒãã²ãŒã ãå®è£ ããã«ã¯ããã¹ãŠã®çš®é¡ã®ãã¡ã VGAããã³PS / 2ã³ãã¯ã¿ãå¿ èŠã§ãã ãããã«å ããŠãFPGAå ã®ããžãã¯ã®ã°ããŒãã«ãªã»ããã«ã¹ã€ããã䜿çšããŸããã
ã²ãŒã ã®åºæ¬æŠå¿µ
ã©ãããïŒ
å€ããããžã§ã¯ãã§ã¯ã次ã®ãã®ãå®è£ ãããŠããŸãã
-ããŒããŒãããã®ã³ãã³ãå ¥åïŒå¶åŸ¡PWMå€èª¿åšãšãã£ã¹ãã¬ã€ïŒ;
-解å床640x480ã®èªå·±èšè¿°VGAã€ã³ã¿ãŒãã§ã€ã¹ã
-PWMã«åºã¥ã8x8 LEDã®ãããªãã¯ã¹äžã®ç¹æ» ããããŒãã
æåã®2ç¹ã¯ã²ãŒã ã®éçºæéãå€§å¹ ã«ççž®ãããããèªè»¢è»ãçºæããŸããã§ããã
ã²ãŒã ã®ã«ãŒã«ïŒ
- ããŒããŒãå¶åŸ¡ïŒ
ã WSAD ã-ç»é¢å ã移åããç¢å°ãã¿ã³ã
ã Enter ã-å°é·ã®æç¡ããã£ãŒã«ãã§ç¢ºèªããŸãã
ã ã¹ããŒã¹ ã-æ°ããã²ãŒã ãéå§ããŸãã
ã Esc ã-çŸåšã®ã²ãŒã ãå®äºããŸãã
ã Y / N ã-æ°ããã²ãŒã ãéå§ããŸãã - ãã£ãŒã«ã8x8ããã£ãŒã«ããããããã8åã
- æ®ãã®ã«ãŒã«ã¯ãéåžžã®ãµãããŒã²ãŒã ãšåãã§ãã
FPGAããã°ã©ãã³ã°èšèªïŒ VHDL
ããã¯ãPlanAheadããã°ã©ã ã®å®æãããããžã§ã¯ãããåæããã³ãã¬ãŒã¹ã®æ®µéãã©ã®ããã«åŠçãããã瀺ããŠããŸãã 玫è²ã®ãã¬ãŒã å ã®ãããã¯ã¯ãã¯ãªã¹ã¿ã«ã®å æãªãœãŒã¹ã§ãã

倧ããªãããã¯ïŒã²ãŒã ã®ã¡ã€ã³ããžãã¯ã
äžå€®ãããã¯ïŒPS / 2ããŒããŒãã³ã³ãããŒã©ãŒ;
å°ãããã¯ïŒVGAãã£ã¹ãã¬ã€ã³ã³ãããŒã©ãŒã
ãããžã§ã¯ãéå±€ïŒ
èšèšã®æåã®æ®µéã®1ã€ã§ã¯ããããžã§ã¯ããã©ã®ããã«èŠããããããã³èšè¿°ããã䟿å©ãªã³ã³ããŒãã³ãã®æ°ãææ¡ããå¿ èŠããããŸãã ç§ã¯æ¬¡ã®æ§é ãæãã€ããŸããïŒ
->ãããã¬ãã«
----> PS / 2ã³ã³ãããŒã©ãŒ
----> VGA 640x480ã³ã³ãããŒã©ãŒ
---->ã²ãŒã ã³ã³ãããŒã©ãŒ
------->åè§åœ¢ã®å¢çæç»ãããã¯ã
-------> 8x8ã®å ¥åæžã¿ãã£ãŒã«ããæç»ããããã®ãããã¯
------->ãã£ãŒã«ãã«å°é·ãæ°åãæãããã®ãããã¯
----------->å°é·ã®é 眮ã®ããã®ã¡ã¢ãª
----------->æåã¡ã¢ãª
------->ããã¹ãããã³ãã€ã¢ãã°ã¡ãã»ãŒãžã®ã¬ã³ããªã³ã°ããããã¯ãã
----------->æåã¡ã¢ãª
ããã¯ãã¶ã€ãªã³ã¯ã¹PlanAheadç°å¢ã§ã®å€èŠ³ã§ãã

ãããã¬ãã«
ã¡ã€ã³I / OããŒãã«ã€ããŠèª¬æããå ¥ååšæ³¢æ°ã50 MHzãã25 MHzã«å€æããããã®DCMåšæ³¢æ°åæãŠããããå«ãŸããŠããŸãã æäžäœã³ãŒãã¯æ¬¡ã®ãšããã§ãã
entity top_minesweeper is port( -- PS/2 IO -- PS2_CLK : in std_logic; -- CLK from PS/2 keyboard PS2_DATA : in std_logic; -- DATA from PS/2 keyboard -- CLOCK 50 MHz -- CLK : in std_logic; -- MAIN CLOCK 50 MHz -- VGA SYNC -- VGA_HSYNC : out std_logic; -- Horizontal sync VGA_VSYNC : out std_logic; -- Vertical sync VGA_R : out std_logic; -- RED VGA_G : out std_logic; -- GREEN VGA_B : out std_logic; -- BLUE -- SWITCHES -- RESET : in std_logic -- Asynchronous reset: SW(0) ); end top_minesweeper;
PS / 2ã³ã³ãããŒã©ãŒ
ãã®ãããžã§ã¯ãã¯åºç€ãšããŠæ¡çšãããŠããŸãã ããã«ç²åŸããŸããã ã·ãªã¢ã«äŒéã€ã³ã¿ãŒãã§ã€ã¹ã¯éåžžã«åå§çã§ãã2è¡ïŒããŒããŒãã³ãã³ãã§ããPS2_CLKãšPS2_DATAã§ãã
èœãšãç©Ž-æåã¯ãMakeãã³ãŒãã®å©ããåããŠãããŒã®ãããŒã¹ãããŒã¯ããç¥ãããåäžã®ã€ã³ãã«ã¹ïŒãšããžã«æ²¿ã£ãŠïŒãçæããŸããã ããã«ãããå¥ã®ããŒãæŒããããšãã«ã·ãã¥ã¬ãŒããããåæŒäžãè¡ãããŸããã ãã€ãã®ãMakeãã³ãŒããšãBreakãã³ãŒãã¯äžèŽããããããBreakãã³ãŒããæå®ãããšãæ¡ä»¶ãããæ確ã«ããå¿ èŠããããŸããã
PS / 2ã³ã³ãããŒã©ãŒã®ã³ãŒãè¡šã¯ãäžèšã®ãªã³ã¯ã«èšèŒãããŠããŸãã
VGAã³ã³ãããŒã©ãŒ
äžåºŠããã¬ãŒãã³ã°ã®ç®çã§ãç§ã¯èªåã§æžããŸãããããã®æäœã®ã¢ã«ãŽãªãºã ã¯ãã¹ãŠã®VGAã³ã³ãããŒã©ãŒãšãŸã£ããåãã§ãã Habréã§ãåæ§ã§ã ã

äž»ãªæ©èœïŒ
-ã³ã³ãããŒã©ãŒåšæ³¢æ°ïŒ25.175 MHz
-ç»é¢è§£å床ïŒ640x480
-æŽæ°é »åºŠïŒ60Hz
-å©çšå¯èœãªãã¬ããïŒRGB
æ®å¿µãªããããããã°ããŒãã«ã¯çµã¿èŸŒã¿ã®ã«ã©ãŒãã¬ãã埩å·åãããããªãããã 3ã€ã®åè² ïŒèµ€ãç·ãéïŒãš5ã€ã®çµã¿åãã ïŒé»è²ãããŒã³ã¿ãã·ã¢ã³ãçœãé»ïŒãã䜿çšã§ããŸããã ããããããã¯é è²ãæãä»ãããã«æ¢ãŸããããŸã°ããç»åã衚瀺ããããšãããããŸããïŒ ïŒæåŸã®ãããªãåç §ïŒ
ã²ãŒã ã³ã³ãããŒã©ãŒ
Sapperã²ãŒã ã³ã³ãããŒã©ãŒãèšè¿°ããæãç°¡åãªæ¹æ³ã¯ãã¹ããŒããã·ã³ïŒ FSM ïŒã«åºã¥ããŠããŸãã ç¹å®ã®ã€ãã³ããåŠçããããã·ã³ã®ç¶æ ãèãåºãå¿ èŠããããŸãã
ç§ã®ãããžã§ã¯ãã§ã¯ããã·ã³ã®5ã€ã®åºæ¬çãªçµã¿åããã䜿çšããŠããŸãã
- WAIT_START ïŒãã¹ãŠã®å¶åŸ¡ä¿¡å·ã®ãªã»ãããæå°ã«ãŠã³ã¿ãŒãã©ã³ãã ã²ãŒã ãžã§ãã¬ãŒã¿ãŒã®èµ·åã
- PLAY ïŒã²ãŒã ããã»ã¹ïŒããŒããŒãããã®ãã¿ã³ã®å¶åŸ¡ãå°é·æ€çŽ¢ïŒ;
- CHECK ïŒå°é·ãèŠã€ãã£ããã©ããã確èªããŸã-ã²ãŒã ã®æåŸã«é²ã¿ãŸãïŒ;
- GAME_OVER ïŒåå©ãŸãã¯æåã®ã€ãã³ãã決å®ãããã£ã¹ãã¬ã€ã«è¿œå ã®ã¡ãã»ãŒãžã衚瀺ããŸãïŒ;
- RST ïŒãªãã·ã§ã³ã®ã¹ããŒãž-ç»é¢ãã¯ãªã¢ããæ°ããã²ãŒã ãéå§ããå¯èœæ§ãªãã«ãã¹ãŠã®å¶åŸ¡ä¿¡å·ããªã»ããããŸãïŒã
ãã£ã©ã¯ã¿ãŒã¡ã¢ãªãŒ
ã€ã³ã¿ãŒãããã§çºèŠã 1æåã®å¯žæ³ã¯8x16ã§ãã ã·ã³ãã«ã1ãã®äŸïŒ
"00000000", -- 0 "00000000", -- 1 "00011000", -- 2 "00111000", -- 3 "01111000", -- 4 ** "00011000", -- 5 *** "00011000", -- 6 **** "00011000", -- 7 ** "00011000", -- 8 ** "00011000", -- 9 ** "00011000", -- a ** "01111110", -- b ** "00000000", -- c ** "00000000", -- d ****** "00000000", -- e "00000000", -- f
ãã¹ãŠã®ãã£ã©ã¯ã¿ãŒã¯ãRââAMB16ã¯ãªã¹ã¿ã«ãããã¯ã¡ã¢ãªã®åäžãããã¯ã«åãŸããŸãã ã¡ã¢ãªã¯ãã·ã³ãã«ã容é8ã®16åã®ãã¯ãã«ã§æ§æãããããã«é 眮ãããŸããã·ã³ãã«ã衚瀺ããã«ã¯ãã¢ãã¬ã¹ãã¹ã®äžäœ4ããããY座æšãã¯ãã«ã«æ¥ç¶ããå¿ èŠããããŸããè«ç '1'-ã·ã³ãã«ã®è²ã '0'-èæ¯è²ïŒé»ïŒã
ãã£ãŒã«ãã«å°é·ãé 眮ããããã®ã¡ã¢ãª
ãããžã§ã¯ãã®ãã®éšåãæãé·ãä¿®æ£ããããŸããŸãªæŽç·Žããããœãªã¥ãŒã·ã§ã³ãçºæããŸããã æçµçã«ãã²ãŒã ãéžæããROMã¡ã¢ãªã®åœ¢åŒã§æ¬¡ã®ã³ã³ããŒãã³ããäœæããããšã«ããŸããã
ã³ãŒãã®äžéšïŒ
constant N8x8 : integer:=8; -- 88 constant Ngames : integer:=1; -- type round_array_3x64xN is array (Ngames*N8x8*N8x8-1 downto 0) of integer range 0 to 7; constant mem_init0: round_array_3x64xN:=( -- game 0: 1,1,1,0,0,0,0,0, 1,7,1,1,1,1,0,0, 1,1,1,1,7,2,1,0, 0,0,0,1,2,7,1,0, 0,1,1,1,1,1,1,0, 0,1,7,2,7,1,1,1, 0,1,1,2,2,2,2,7, 0,0,0,0,1,7,2,1);
å®æ°N8x8ããã³Ngamesã¯ããã£ãŒã«ãã®ãµã€ãºãšã²ãŒã æ°ãæå®ããŸãã ãã£ãŒã«ãã®çªå·ã¯ãé±å±±ãŸãã¯ãã®åšèŸºã®é±å±±ã®æ°ã«å¯Ÿå¿ããŠããŸãã ã«ãŒã«ã¯éåžžã«ç°¡åã§ãã
- 0ã6ã®æ°å-é±å±±ã®æ°ã決å®ãã
- çªå·7-ãã£ãŒã«ãã§å°é·ãäºçŽããã³å®çŸ©ããŸãã
ãªããã
ç§ã¯ã7åãŸãã¯8åããã€ã³ãã®ããè¿ãã«ããç¶æ³ãèããŠããŸããã§ããã 8åéãš8x8ãã£ãŒã«ãã§ã¯ããããã¯ããŸãã«ãé¢çœããªã決å®ã§ãã ãŸãã0ã7ã®æ°åã¯3ãããã®ã¿ãå æããŸãããé±å±±ã®0ã8ãš9ã®çµã¿åããã¯ãã§ã«4ããããå æããŠããŸãã ãã®ç¹ã§ãç§ã¯ã¯ãªã¹ã¿ã«ã®å éšããžãã¯ãšãã¬ãŒã¹ãªãœãŒã¹ãç¯çŽããããšã倧ãã«æ¥œããã§ããŸããããšããããã®ãªãœãŒã¹ã5ã€ã®ãããžã§ã¯ãã«ååã§ãã£ããšããŠãã§ãã
ãããã£ãŠããã¹ãŠã®æ°å€ã¯ãã²ãŒã ã§è¿œå ã§ããäžçš®ã®ROMã¢ã¬ã€ã«åãŸããŸãã ç§ã®ãããžã§ã¯ãã«ã¯32åã®ã²ãŒã ããããRAMB16ã®ã¡ã¢ãªãããã¯ã¯1å匱ã§ãã æ°å€ã¯æŽæ°åœ¢åŒã§æå®ãããããšã«æ³šæããŠãã ããã std_logic_vectorïŒ2ïŒ0ïŒãžã®å€æãšãããªãåŠçã®ããã«ãç¹å¥ãªé¢æ°ãäœæãããŠããŸãã æŽæ°åœ¢åŒã¯ãæ°ããã²ãŒã ã®èšé²ãç°¡çŽ åããæéãå€§å¹ ã«ç¯çŽããŸããã å€ãã®VHDL FPGAéçºè ã¯ãæŽæ°åã®æ§é ãåžžã«åæããããšã¯éããªããããæŽæ°åœ¢åŒã䜿çšãããç¶æ³ã«ãã£ãŠæ··ä¹±ã«é¥ãããšããããŸãã å®éã®ããŒããŠã§ã¢ã§ã¯ãã§ãã¯ã§ããŸããã ããããROMãžã§ãã¬ãŒã¿ãŒã®å ŽåãæŽæ°ãæé©ã§ãã
ç¬èªã®é±å±±ã®ã¬ã€ã¢ãŠããè¿œå ããã«ã¯ã8x8ãã£ãŒã«ããé åã«æ£ããå ¥åããå¿ èŠããããŸãã æã§è©°ããã²ãŒã ã®ããªãšãŒã·ã§ã³ã ç§ã®ãããžã§ã¯ãã§ã¯ãåèš32ã®é±å±±é 眮ã®çµã¿åããããããŸãã
å¢çç·ãšãã£ãŒã«ããæç»ããããã®ãããã¯8x8
æåã¯ã·ã³ãã«ãžã§ãã¬ãŒã¿ãŒã«å®è£ ããŸããããã¯ãªã¹ã¿ã«ãªãœãŒã¹ãç¯çŽããããšã«ããŸããã 網æãã®æ£æ¹åœ¢ãšãã¬ãŒã ã®ããã«ãRAMB16ã»ã«å šäœã䜿çšããã®ã¯æå³ããªããšæããŸããã ïŒãªãœãŒã¹ã«ããæé©åïŒïŒãããã£ãŠããã¹ãŠããã«ããã¬ã¯ãµã§å®è¡ãããŸãã ããã«ã€ããŠã¯è©³ãã説æããŸããã
å°é·ãšæ°åãæãããã®ãããã¯
äžé£ã®ã²ãŒã ã®ã¡ã¢ãªã®ããŒã¿ããæåã¡ã¢ãªã䜿çšããŠç»é¢äžã®æ°åãšå°é·ã«å€æããŸãã æåã¯ã8x8ã®æ£æ¹åœ¢ãã£ãŒã«ãã衚瀺ãããã£ãã®ã§ãããããããROMãžã§ãã¬ãŒã¿ãŒãæžãæããã®ãé¢åã«ãªããé·æ¹åœ¢ã®ãŸãŸã«ããŸããã
ãã®ãããã¯ã§ã¯ãç¹å¥ãª8x8ãã¹ã¯ãäœæããå¿ èŠããããŸãããããã䜿çšããŠããEnterããæŒããšãå¡ãã€ã¶ãããã»ã«ãæ°åãŸãã¯å°é·ã«å€ãããŸãã
ããã¹ããšã¡ãã»ãŒãž
ããã¹ãã¯1ã€ã®éšåã§æžãããŠããŸããã€ãŸãããã¹ãŠãäžåºŠã«ç»é¢ã«æžã蟌ãŸããŸãããã²ãŒã ã®æ®µéã«ãã£ãŠã¯ãäžéšã®æ å ±ãèŠããªããŸãŸã«ãªããŸãïŒããšãã°ãæåãåå©ã«é¢ããã¡ãã»ãŒãžïŒã åãæåãžã§ãã¬ãŒã¿ãŒã䜿çšãããŸãã ã·ã³ãã«ã®ãµã€ãºã¯8x16ã§ããããã640x480ã®è¡šç€ºãã£ãŒã«ãã¯ã»ã¯ã·ã§ã³80x30ã«åå²ã§ããããã«ã·ã³ãã«ã衚瀺ãããŸãã ããã¯ã©ã®ããã«è¡ãããŸããïŒ
以äžã«ç°¡åãªäŸã瀺ããŸãã
addr_rom <= data_box(6 downto 0) & y_char(3 downto 0) when rising_edge(clk); x_char_rom: ctrl_8x16_rom -- port map ( clk => clk, addr => addr_rom, data => data_rom); pr_sel: process(clk, reset) is -- begin if reset = '0' then data <= '0'; elsif rising_edge(clk) then data <= data_rom(to_integer(unsigned(not x_char(2 downto 0)))); end if; end process; g_rgb: for ii in 0 to 2 generate -- begin rgb(ii) <= data and color(ii); end generate;
æåã«ãã¡ã¢ãªã¢ãã¬ã¹ã䜿çšããŠ1ã€ãŸãã¯å¥ã®æåãéžæããæ¹æ³ãç解ããå¿ èŠããããŸãã ã¢ãã¬ã¹ã2ã€ã®ãã¯ãã«ãy_charããšãdata_boxãã§æ§æãããŠããããšãããããŸãã
y_charïŒ3ãã0ïŒã¯ãY軞ã«æ²¿ã£ã座æšãã¯ãã«ã®æäžäœãããã§ããããã®ããŒã¿ã¯èªåçã«æŽæ°ãããVGAã³ã³ãããŒã©ãŒããååŸãããŸãã
data_boxïŒ6 downto 0ïŒ-ä¿¡å·ã¯ããã£ãŒã«ãã§äœ¿çšãããæåãéžæããŸãã ãã®ãã¯ãã«ã¯èªåã§äœæããå¿ èŠããããŸãã
data_box <= "000001"ãæžã蟌ããšããžã§ãã¬ãŒã¿ãŒã®æåã®æåããã¯ã¿ãŒ "data_rom"ã«æžã蟌ãŸããŸãã pr_selããã»ã¹ã¯ãããŒã¿ãã¯ãã«ãã·ãªã¢ã«ã³ãŒãã«å€æããŸãã X座æšã¬ãžã¹ã¿ã®æäžäœ3ãããã«å¿ããŠãdata_romãã¯ãã«ã®ç¹å®ã®ããããéžæãããŸãã æåã¯ãç»é¢äžã®ããŒã¿ããã©ãŒãªã³ã°ããåé¡ã«ééããŸããã 解決çã¯ç°¡åã§ã-x_charä¿¡å·ã®å転ã
åºåã¯ãä¿æ°ã¡ã¢ãªããã®ããŒã¿ã䜿çšããè«çå€æåŸã«VGAã³ãã¯ã¿ã«äŸçµŠãããRGBä¿¡å·ã§ãã
éã®å®çŸ
ããã¯ãã¹ãŠ1ã€ã®å€§ããªãããžã§ã¯ãã«ãªããŸãã çŸããã®ããã«ãã·ã³ãã«ãªã«ãŠã³ã¿ãŒã®å©ããåããŠãç§ã¯åå©/æåã®ã¡ãã»ãŒãžã®ç¹æ» ãå°ç¡ãã«ããã©ã³ãã ã²ãŒã ãéžæãããžã§ãã¬ãŒã¿ãŒãè¿œå ããŸããã
FPGAããŒããšããŸããŸãªå±æ§ã®æ¥ç¶ãèšè¿°ãã* .UCFãã¡ã€ã«ã¯ãVHDLã®ãœãŒã¹ã«å¿ ããã蟌ãŸããŸãã äŸïŒ
## Switches NET "RESET" LOC = "P148" | IOSTANDARD = LVTTL | PULLUP ; ## SW<0> NET "ENABLE" LOC = "P142" | IOSTANDARD = LVTTL | PULLUP ; ## SW<1> ## VGA ports NET "VGA_R" LOC = "P96" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; NET "VGA_G" LOC = "P97" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; NET "VGA_B" LOC = "P93" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; NET "VGA_HSYNC" LOC = "P90" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; NET "VGA_VSYNC" LOC = "P94" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; ## CLK 50 MHz NET "CLK" LOC = "P183" | IOSTANDARD = LVCMOS33 ; NET "CLK" TNM = "CLK_TN"; TIMESPEC TS_CLK = PERIOD "CLK_TN" 20 ns HIGH 50%; # PS/2 KEYBOARD NET "PS2_CLK" LOC = "P99" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; NET "PS2_DATA" LOC = "P100" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
Aldec Active-HDL CADããã³Xilinx ISE CADã䜿çšããŠãFPGAãã¶ã€ã³ãåæããã³ãã¬ãŒã¹ããŸãã ã€ãã³ãåŠçã¯è€éã§ããããããã¹ããã³ããèšè¿°ããã«ãããã°ãå®è¡ãããã¡ãŒã ãŠã§ã¢ãFPGAã«çŽæ¥ã¢ããããŒãããŠããã£ã¹ãã¬ã€ã®åºåã確èªããŸããã ååãšããŠããã¹ãŠãäžåºŠã«æ©èœããŸããã äž»ãªãšã©ãŒã¯ãä¿¡å·ã®åæã§ããã ããšãã°ãã©ãããããã¢ãã¬ã¹ã®åææäœãšããŒã¿ã®èªã¿åãã®è©Šè¡ã ãã®ãããªãšã©ãŒã¯ãé©åãªå Žæã§ãµã€ã¯ã«ããšã«è¿œå ã®é 延ãå°å ¥ããããšã§è¿ éã«ä¿®æ£ãããŸãã æ·±å»ãªå Žåã ChipScope Pro ïŒ Core Inserter and Analyzer ïŒã䜿çšãããŸããã
ãããã«
ãã€ã³ã¹ã€ãŒãããã²ãŒã ã¯ããããã°ããŒãã§æ£åžžã«ç²åŸããŸããã
ãã£ãŒã«ãã®ãµã€ãºã¯8x8ããã£ãŒã«ããããã®å°é·ã®æ°ã¯8ã§ãã
ã²ãŒã æ°ã¯32ã§ããéå§ããåã«ãå°é·ã®é 眮ã¯ãã£ãŒã«ãã®ã¡ã¢ãªããã©ã³ãã ã«éžæãããŸãã
ã¯ãªã¹ã¿ã«ã®å æãªãœãŒã¹ïŒFPGAã¯ã»ãšãã©ç©ºã§ãïŒïŒ

åç
çµæã¯æ¬¡ã®ããã«ãªããŸãã
ãã®ä»ã®åç...
ã²ãŒã ã³ã³ãããŒã©ãŒã®åéã§ã®FPGAãšãã£ã¿ãŒã§ã®ãã¬ãŒã¹ïŒ
RTLåè·¯å³ã®ãããžã§ã¯ãã®åè·¯å³ãã¥ãŒïŒ
ChipScope Pro Analyzerã§ãããžã§ã¯ãããããã°ïŒéããŠãã空ã®ãã£ãŒã«ãã®æ°ãã«ãŠã³ãïŒïŒ

RTLåè·¯å³ã®ãããžã§ã¯ãã®åè·¯å³ãã¥ãŒïŒ

ChipScope Pro Analyzerã§ãããžã§ã¯ãããããã°ïŒéããŠãã空ã®ãã£ãŒã«ãã®æ°ãã«ãŠã³ãïŒïŒ
GithubãœãŒã¹ã³ãŒã ã
ã²ãŒã ãã¢