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struct msr_perf_status { unsigned curr_psv : 16; /* Current PSV */ unsigned status : 8; /* Status flags */ unsigned min_mult : 8; /* Minimum multiplier */ unsigned max_psv : 16; /* Maximum PSV */ unsigned init_psv : 16; /* Power-on PSV */ };
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struct psv { unsigned vid : 6; /* Voltage Identifier */ unsigned _reserved1 : 2; unsigned freq : 5; /* Frequency Identifier */ unsigned _reserved2 : 1; unsigned nibr : 1; /* Non-integer bus ratio */ unsigned slfm : 1; /* Dynamic FSB frequency (Super-LFM) */ };
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E8000ãE7000 | 825.0 | 12.5 | 1,100.0 | 850,0 | 1362.5 |
X9000 | 712.5 | 12.5 | 1,200.0 | 800,0 | 1325.0 |
T9000 | 712.5 | 12.5 | 1,200.0 | 750.0 | 1300.0 |
P9000ãP8000 | 712.5 | 12.5 | 1,200.0 | 750.0 | 1300.0 |
Q9000DãQ8000D | 825.0 | 12.5 | 1,100.0 | 850,0 | 1362.5 |
Q9000M | 712.5 | 12.5 | 1,200.0 | 850,0 | 1300.0 |
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struct msr_perf_ctl { unsigned psv : 16; /* Requested PSV */ unsigned _reserved1 : 16; unsigned ida_diseng : 1; /* IDA disengage */ unsigned _reserved2 : 31; };
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struct Pstate { unsigned CoreFrequency; /* Core CPU operating frequency, MHz */ unsigned Power; /* Maximum power dissipation, mW */ unsigned Latency; /* Worst-case latency of CPU unavailability during transition, µs */ unsigned BusMasterLatency; /* Worst-case latency while Bus Masters are unable to access memory, µs */ unsigned Control; /* Value to be written to the PERF_CTL to switch to this state */ unsigned Status; /* Value (should be equal to the one read from PERF_STATUS) */ };
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Name (_PSS, Package (0x06) { // 6 (P-states) Package (0x06) { 0x000008DB, // 2267 MHz (cf. Fid à FSB clock) 0x00006978, // 27000 mW 0x0000000A, // 10 µs ( ) 0x0000000A, // 10 µs 0x0000112B, // 0x11 = 17 (, Fid), 0x2b = 43 (Vid) 0x0000112B }, Package (0x06) { 0x0000074B, // 1867 MHz (82% ) 0x000059D8, // 23000 mW 0x0000000A, 0x0000000A, 0x00000E25, // Fid = 14, Vid = 37 0x00000E25 }, Package (0x06) { 0x00000640, // 1600 MHz (71% ) 0x00005208, // 21000 mW 0x0000000A, 0x0000000A, 0x00000C20, // Fid = 12, Vid = 32 0x00000C20 }, Package (0x06) { 0x00000535, // 1333 MHz (59% ) 0x00004650, // 18000 mW 0x0000000A, 0x0000000A, 0x00000A1C, // Fid = 10, Vid = 28 0x00000A1C }, Package (0x06) { 0x0000042B, // 1067 MHz (47% ) 0x00003E80, // 16000 mW 0x0000000A, 0x0000000A, 0x00000817, // Fid = 8, Vid = 23 0x00000817 }, Package (0x06) { 0x00000320, // 800 MHz (35% ) 0x000032C8, // 13000 mW 0x0000000A, 0x0000000A, 0x00000612, // Fid = 6, Vid = 18 0x00000612 } })
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@@ -7385,8 +7385,8 @@ 0x00006978, 0x0000000A, 0x0000000A, - 0x0000112B, - 0x0000112B + 0x0000111D, + 0x0000111D }, Package (0x06) @@ -7395,8 +7395,8 @@ 0x000059D8, 0x0000000A, 0x0000000A, - 0x00000E25, - 0x00000E25 + 0x00000E12, + 0x00000E12 }, Package (0x06) @@ -7405,8 +7405,8 @@ 0x00005208, 0x0000000A, 0x0000000A, - 0x00000C20, - 0x00000C20 + 0x00000C0C, + 0x00000C0C }, Package (0x06) @@ -7415,8 +7415,8 @@ 0x00004650, 0x0000000A, 0x0000000A, - 0x00000A1C, - 0x00000A1C + 0x00000A07, + 0x00000A07 }, Package (0x06) @@ -7425,8 +7425,8 @@ 0x00003E80, 0x0000000A, 0x0000000A, - 0x00000817, - 0x00000817 + 0x00000802, + 0x00000802 }, Package (0x06) @@ -7435,8 +7435,8 @@ 0x000032C8, 0x0000000A, 0x0000000A, - 0x00000612, - 0x00000612 + 0x00000600, + 0x00000600 } })
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